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In-Memory Computing

By Lawrence D'Oliveiro on Wed Nov 13 06:30:34 2024

Latest reply by Lawrence D'Oliveiro on Sun Nov 17 23:17:54 2024
Arm ldaxr / stxr loop question

By jseigh on Mon Oct 28 15:13:03 2024

Latest reply by Chris M. Thomasson on Sun Nov 17 15:34:08 2024
Interpreters and indirect-branch prediction (was: Reverse ...)

By anton on Thu Nov 14 08:35:41 2024

Latest reply by anton on Thu Nov 14 08:35:41 2024
Reverse engineering of Intel branch predictors

By Thomas Koenig on Wed Oct 23 18:36:16 2024

Latest reply by Thomas Koenig on Thu Nov 14 06:54:04 2024
Interpreters and indirect-branch prediction

By anton on Wed Nov 13 08:20:27 2024

Latest reply by BGB on Wed Nov 13 20:33:19 2024
Semi OT Grace Hopper lecture

By Stephen Fuld on Thu Nov 7 13:21:59 2024

Latest reply by Terje Mathisen on Sat Nov 9 22:39:46 2024
Current/Ongoing Experiment: XG3RV

By BGB on Thu Nov 7 00:43:30 2024

Latest reply by BGB on Thu Nov 7 00:43:30 2024
Re: Tonights Tradeoff - Background Execution Buffers

By Robert Finch on Wed Oct 9 06:44:08 2024

Latest reply by Robert Finch on Tue Nov 5 23:30:50 2024
Re: Microsoft makes a lot of money, Is Intel exceptionally unsuccessful as an architecture designer?

By Andreas Eder on Mon Nov 4 09:43:30 2024

Latest reply by scott on Mon Nov 4 15:51:52 2024
Re: portable malloc

By Lawrence D'Oliveiro on Mon Oct 21 23:17:10 2024

Latest reply by Thomas Koenig on Tue Oct 29 21:27:29 2024
Re: In-memory database

By antispam on Mon Oct 28 23:45:53 2024

Latest reply by Lawrence D'Oliveiro on Tue Oct 29 00:17:34 2024
Re: tiny portable malloc

By John Levine on Sun Oct 27 23:58:05 2024

Latest reply by John Levine on Sun Oct 27 23:58:05 2024
Re: old phones, x86S Specification

By John Levine on Fri Oct 25 00:31:17 2024

Latest reply by Michael S on Sat Oct 26 20:15:30 2024
Re: is Vax addressing sane today

By Chris M. Thomasson on Mon Oct 7 13:57:04 2024

Latest reply by antispam on Sat Oct 26 18:37:14 2024
Re: Power performace

By antispam on Sat Oct 26 18:14:25 2024

Latest reply by antispam on Sat Oct 26 18:14:25 2024
x86S Specification

By EricP on Thu Oct 17 17:34:14 2024

Latest reply by BGB on Thu Oct 24 23:31:35 2024
Re: Privilege Levels Below User

By Paul A. Clayton on Sun Oct 20 20:42:32 2024

Latest reply by mitchalsup on Wed Oct 23 22:38:40 2024
MM instruction and the pipeline

By Stephen Fuld on Tue Oct 15 22:56:34 2024

Latest reply by EricP on Tue Oct 22 14:45:09 2024
Re: C and turtles, 80286 protected mode

By John Levine on Wed Oct 16 01:08:40 2024

Latest reply by George Neuner on Tue Oct 22 17:28:49 2024
Re: Misc: BGBCC targeting RV64G, initial results...

By BGB on Tue Oct 8 14:06:34 2024

Latest reply by BGB on Mon Oct 21 19:38:41 2024
Re: 80286 protected mode

By Lawrence D'Oliveiro on Mon Oct 7 21:52:31 2024

Latest reply by Tim Rentsch on Mon Oct 21 18:32:27 2024
Re: fine points of dynamic memory allocation, not 80286 protected mode

By John Levine on Thu Oct 17 18:31:22 2024

Latest reply by Tim Rentsch on Fri Oct 18 07:12:51 2024
Re: clouds, not Byte ordering

By John Levine on Thu Oct 17 02:35:07 2024

Latest reply by David Brown on Thu Oct 17 14:41:06 2024
Re: Byte ordering

By Michael S on Tue Oct 8 00:11:31 2024

Latest reply by David Brown on Thu Oct 17 14:39:45 2024
Re: My 66000 and High word facility

By Paul A. Clayton on Wed Oct 16 13:40:13 2024

Latest reply by Paul A. Clayton on Wed Oct 16 13:40:13 2024
Re: except what, is Vax addressing sane today

By Chris M. Thomasson on Wed Oct 16 11:10:41 2024

Latest reply by Chris M. Thomasson on Wed Oct 16 11:10:41 2024
Extending GPRs with AF+CF (Was: is Vax addressing sane today)

By Michael S on Tue Oct 15 13:46:33 2024

Latest reply by mitchalsup on Tue Oct 15 19:35:31 2024
memcpy and friend (was: 80286 protected mode)

By Michael S on Tue Oct 15 13:12:41 2024

Latest reply by David Brown on Tue Oct 15 14:03:18 2024
Re: Interrupts in OoO

By EricP on Mon Oct 7 17:01:37 2024

Latest reply by anton on Sun Oct 13 15:20:37 2024
Re: Computer architects leaving Intel...

By Michael S on Sun Oct 13 11:30:52 2024

Latest reply by Michael S on Sun Oct 13 11:30:52 2024
Historical evolution of CPU perf

By Stefan Monnier on Wed Oct 9 12:33:51 2024

Latest reply by scott on Sat Oct 12 19:06:39 2024
Re: core memory, Historical evolution of CPU perf

By John Levine on Fri Oct 11 19:40:11 2024

Latest reply by John Levine on Sat Oct 12 19:57:04 2024
VMS/NT memory management (was: Byte ordering)

By Stefan Monnier on Wed Oct 9 16:01:42 2024

Latest reply by scott on Sat Oct 12 15:20:13 2024
Re: Is Intel exceptionally unsuccessful as an architecture designer?

By David Brown on Tue Oct 8 09:17:26 2024

Latest reply by anton on Sat Oct 12 08:27:37 2024
Re: Byte ordering (was: Whether something is RISC or not)

By Lawrence D'Oliveiro on Mon Oct 7 21:46:28 2024

Latest reply by Lawrence D'Oliveiro on Mon Oct 7 21:46:28 2024